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A 1Gbps FPGA-based wireless baseband MIMO transceiver

Toal, C, Sezer, S, Burns, D, Xiao, Pei and Fusco, V (2012) A 1Gbps FPGA-based wireless baseband MIMO transceiver In: IEEE International SOC Conference, 2012-09-12-2012-09-14, Niagara Falls, NY, USA.

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This paper presents the design and implementation of a high performance baseband transceiver targeted for System on a Chip (SoC). The presented architecture utilizes a 4×4 Multiple-Input Multiple-Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM) system and is capable of enabling greater than 1Gbps wireless transmission. A complex channel equalization circuit is realized using matrix inversion via high-resolution QR decomposition. Full synthesis results are included as this MIMO-OFDM transceiver has been proved on standard FPGA technology.

Item Type: Conference or Workshop Item (Conference Paper)
Divisions : Faculty of Engineering and Physical Sciences > Electronic Engineering > Centre for Communication Systems Research
Authors :
Toal, C
Sezer, S
Burns, D
Fusco, V
Editors :
Sridhar, Ramalingam
Schuhmann, Norbert
Shi, Kaijian
Date : 31 December 2012
DOI : 10.1109/SOCC.2012.6398348
Copyright Disclaimer : © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Uncontrolled Keywords : Matrix decomposition;, OFDM;, Channel estimation; MIMO; Arrays;, Transmitters; Receivers
Related URLs :
Additional Information : Paper no TA1.3
Depositing User : Symplectic Elements
Date Deposited : 15 Nov 2013 13:58
Last Modified : 03 Oct 2019 09:55

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