Items where Author is "Trainor, MJ"

Article

Sporea, RA, Trainor, MJ, Young, ND, Shannon, JM and Silva, SRP (2012) Field plate optimization in low-power high-gain source-gated transistors IEEE Transactions on Electron Devices, 59 (8). ISSN 0018-9383

Sporea, RA, Shannon, JM, Silva, SRP, Trainor, MJ and Young, ND (2012) Field plate optimization in low-power high-gain source-gated transistors IEEE Transactions on Electron Devices, 59 (8). 2180 - 2186. ISSN 0018-9383

Sporea, RA, Shannon, JM, Silva, SRP, Trainor, MJ, Young, ND and Guo, X (2011) Performance trade-offs in polysilicon source-gated transistors Solid-State Electronics, 65-66 (1). 246 - 249. ISSN 0038-1101

Sporea, RA, Trainor, MJ, Young, ND, Guo, X, Shannon, JM and Silva, SRP (2011) Performance trade-offs in polysilicon source-gated transistors Solid-State Electronics, 65-66 (1). 246 - 249. ISSN 0038-1101

Sporea, RA, Trainor, MJ, Young, ND, Guo, X, Shannon, JM and Silva, SRP (2011) Performance trade-offs in polysilicon source-gated transistors Solid-State Electronics, 65-66 (1). 246 - 249. ISSN 0038-1101

Sporea, RA, Trainor, MJ, Young, ND, Shannon, JM and Silva, SRP (2010) Intrinsic gain in self-aligned polysilicon source-gated transistors IEEE Transactions on Electron Devices, 57 (10). 2434 - 2439. ISSN 0018-9383

Sporea, RA, Trainor, MJ, Young, ND, Shannon, JM and Silva, SRP (2010) Performance improvements in polysilicon source-gated transistors DRC Conference Digest . 245 - 246.

Sporea, RA, Shannon, JM, Silva, SRP, Trainor, MJ and Young, ND (2010) Performance trade-offs in polysilicon source-gated transistors Proceedings of the European Solid State Device Research Conference, ESSDERC 2010 . 222 - 225.