Asynchronous VLSI design.

Nedelchev, Ivailo Marinov. (1995) Asynchronous VLSI design. Doctoral thesis, University of Surrey (United Kingdom)..

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Abstract

This thesis describes the background and implementation of a novel silicon compiler from a high-level programming language, OCCAM(async), to asynchronous CMOS circuits. The compilation scheme is based on a process algebra description of a concurrent system. This Algebra is called Delay-Insensitive Algebra and is based on CSP but allows the user more freedom in communication protocols. The thesis reviews and compares various, existing, design styles and their practical aspects for asynchronous design are also discussed. The syntax and the operational semantics of OCCAM(async) are defined and, on this basis, the new compilation technique is described with its underlying CMOS circuitry. The implementations of various, novel, library cells are also discussed. The compilation technique is illustrated throughout the thesis with practical examples. It is also compared to an existing synthesis tool, Tangram, which has been developed at Phillips Research Laboratories. The thesis concludes with the place and the role of OCCAM(async) in the contemporary CMOS design, and the future aspects in continuing this research into the full, design-process automation.

Item Type:	Thesis (Doctoral)
Divisions :	Theses
Authors :	Name Email ORCID Nedelchev, Ivailo Marinov.
Date :	1995
Contributors :	Contribution Name Email ORCID http://www.loc.gov/loc.terms/relators/THS
Depositing User :	EPrints Services
Date Deposited :	09 Nov 2017 12:17
Last Modified :	20 Jun 2018 11:24
URI:	http://epubs.surrey.ac.uk/id/eprint/844150

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