Shallow junctions in silicon via low thermal budget processing
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Sealy, BJ, Smith, AJ, Alzanki, T, Bennett, N, Li, L, Jeynes, C, Colombeau, B, Collart, EJH, Emerson, NG, Gwilliam, RM and Cowern, NEB (2006) Shallow junctions in silicon via low thermal budget processing Extended Abstracts of the Sixth International Workshop on Junction Technology, IWJT '06. pp. 10-15.
Full text not available from this repository.Item Type: | Article | ||||||||||||||||||||||||||||||||||||
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Divisions : | Surrey research (other units) | ||||||||||||||||||||||||||||||||||||
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Date : | 2006 | ||||||||||||||||||||||||||||||||||||
Depositing User : | Symplectic Elements | ||||||||||||||||||||||||||||||||||||
Date Deposited : | 17 May 2017 11:13 | ||||||||||||||||||||||||||||||||||||
Last Modified : | 24 Jan 2020 20:31 | ||||||||||||||||||||||||||||||||||||
URI: | http://epubs.surrey.ac.uk/id/eprint/830505 |
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