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Radiation Hardening by Design of Asynchronous Logic for Hostile Environments

Barnhart, DJ, Vladimirova, T, Sweeting, MN and Stevens, KS (2009) Radiation Hardening by Design of Asynchronous Logic for Hostile Environments IEEE JOURNAL OF SOLID-STATE CIRCUITS, 44 (5). pp. 1617-1628.

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Abstract

A wide range of emerging applications is driving the development of wireless sensor node technology towards a monolithic system-on-a-chip implementation. Of particular interest are hostile environment scenarios where radiation an thermal extremes exist. Radiation hardening by design has been recognized for over a decade as an alternative open-source circuit design approach to mitigate a spectrum of radiation effects, but has significant power and area penalties. Similarly, asynchronous logic design offers potential power savings and performance improvements, with a tradeoff in design complexity and a lesser area penalty. These side effects have prevented wider acceptance of both design approaches. A case study supporting the development of monolithic system-on-a-chip wireless sensor nodes is presented. Synchronous, hardened, and asynchronous/hardened implementations of a textbook microprocessor in 0.35 mu m austriamicrosystems SiGe BiCMOS technology are compared. The synergy of this novel asynchronous/hardened design approach is confirmed by simulation and hardware results.

Item Type: Article
Authors :
NameEmailORCID
Barnhart, DJUNSPECIFIEDUNSPECIFIED
Vladimirova, Tt.vladimirova@surrey.ac.ukUNSPECIFIED
Sweeting, MNm.sweeting@surrey.ac.ukUNSPECIFIED
Stevens, KSUNSPECIFIEDUNSPECIFIED
Date : May 2009
Identification Number : https://doi.org/10.1109/JSSC.2009.2017005
Uncontrolled Keywords : Asynchronous logic, environmental tolerance, radiation hardening by design, system-on-a-chip
Depositing User : Symplectic Elements
Date Deposited : 17 May 2017 11:09
Last Modified : 17 May 2017 14:54
URI: http://epubs.surrey.ac.uk/id/eprint/830210

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