Effects of process variations on the current in Schottky Barrier Source-Gated Transistors
Sporea, RA, Guo, X, Shannon, JM and Silva, SRP (2009) Effects of process variations on the current in Schottky Barrier Source-Gated Transistors Proceedings of the International Semiconductor Conference (CAS), 2. 413 - 416.
CAS 2009 Sporea Symplectic.pdf - Accepted Version
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The sensitivity of the drain current in Schottky barrier source-gated transistors to process variation is studied using computer simulations. It is shown that provided the device is designed correctly, the current is independent of source-drain separation and is insensitive to source length variations. However, uniform insulator thickness and precise control of the source barrier is needed if good current uniformity is to be obtained.
|Divisions :||Faculty of Engineering and Physical Sciences > Electronic Engineering > Advanced Technology Institute > Nano-Electronics Centre|
|Identification Number :||10.1109/SMICND.2009.5336693|
|Additional Information :||
Copyright 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
|Depositing User :||Symplectic Elements|
|Date Deposited :||25 Nov 2011 15:58|
|Last Modified :||23 Sep 2013 18:52|
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