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Formal verification of fault-tolerant software design: the CSP approach

Yeung, WL and Schneider, SA (2005) Formal verification of fault-tolerant software design: the CSP approach MICROPROCESSORS AND MICROSYSTEMS, 29 (5). pp. 197-209.

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Item Type: Article
Divisions : Faculty of Engineering and Physical Sciences > Computing Science
Authors :
Yeung, WL
Schneider, SA
Date : 1 June 2005
DOI : 10.1016/j.micpro.2004.07.005
Uncontrolled Keywords : Science & Technology, Technology, Computer Science, Hardware & Architecture, Computer Science, Theory & Methods, Engineering, Electrical & Electronic, Computer Science, Engineering, COMPUTER SCIENCE, HARDWARE & ARCHITECTURE, COMPUTER SCIENCE, THEORY & METHODS, ENGINEERING, ELECTRICAL & ELECTRONIC, fault tolerance, formal verification, model checking, software design, RECOVERY BLOCKS, SPECIFICATION
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Depositing User : Mr Adam Field
Date Deposited : 24 Oct 2011 08:55
Last Modified : 31 Oct 2017 14:09

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