Performance trade-offs in polysilicon source-gated transistors
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Sporea, RA, Shannon, JM, Silva, SRP, Trainor, MJ, Young, ND and Guo, X (2011) Performance trade-offs in polysilicon source-gated transistors Solid-State Electronics, 65-66 (1). 246 - 249. ISSN 0038-1101
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Official URL: http://dx.doi.org/10.1016/j.sse.2011.06.010
Abstract
Self-aligned Schottky-source source-gated transistors (SGTs) have been made in polysilicon. The structures enable a direct comparison to be made between a SGT and a standard thin-film field-effect transistor (FET) on the same device. SGTs having excellent characteristics have been fabricated, with intrinsic gains approaching 10,000. The effects of bulk doping in the polysilicon and of the source barrier modification implant are considered in the context of the electrical output characteristics. It is shown that the choice of source length is a tradeoff between device speed and variations in current output due to variability during fabrication.
| Item Type: | Article |
|---|---|
| Additional Information: | Selected paper from the European Solid-State Device Research Conference (ESSDERC), 14-16 September 2010, Sevilla, Spain. NOTICE: This is the author’s version of a work that was accepted for publication in Solid-State Electronics. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Solid-State Electronics, 65-66(1), December 2011, DOI 10.1016/j.sse.2011.06.010. |
| Divisions: | Faculty of Engineering and Physical Sciences > Electronic Engineering > Advanced Technology Institute > Nano-Electronics Centre |
| ID Code: | 188325 |
| Deposited By: | Symplectic Elements |
| Deposited On: | 27 Mar 2012 15:22 |
| Last Modified: | 16 Feb 2013 15:12 |
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