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Raised source/drain (RSD) for 50nm MOSFETs - effect of epitaxy layer thickness on short channel effects

Waite, A. M., Lloyd, N. S., Ashburn, P., Evans, A. G. R., Ernst, T., Achard, H., Deleonibus, S., Wang, Y. and Hemment, Peter L. F. (2003) Raised source/drain (RSD) for 50nm MOSFETs - effect of epitaxy layer thickness on short channel effects 33rd Conference on European Solid-State Device Research, 2003. pp. 223-226.

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Abstract

We present raised source/drain MOSFET devices with channel lengths down to 50 nm. The raised source/drain structures are fabricated by growing a selective epitaxial silicon layer in the source and drain regions of the MOSFET device after sidewall spacer creation and before HDD implant. The layers were grown in a low pressure LPCVD epitaxy reactor with a mixture of silane and dichlorosilane. A pre-epitaxy process that eliminates the need for a pre-epitaxy bake in hydrogen has been developed. In this study, we have varied the thickness of this selective epitaxial silicon layer to investigate the effect of this parameter on device performance. Reducing the channel length of the devices has a detrimental effect on SCE and DIBL. In this paper, we show how short channel performance can be retrieved by adding raised source/drain structures, and how increasing the thickness of these structures improves these parameters further.

Item Type: Article
Additional Information: Waite, A.M.; Lloyd, N.S.; Ashburn, P.; Evans, A.G.R.; Ernst, T.; Achard, H.; Deleonibus, S.; Wang, Y.; Hemment, P. Raised source/drain (RSD) for 50nm MOSFETs - effect of epitaxy layer thickness on short channel effects. 33rd Conference on European Solid-State Device Research, 2003, 223-226. © 2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Divisions: Faculty of Engineering and Physical Sciences > Electronic Engineering > Advanced Technology Institute > Ion Beam Centre
Depositing User: Mr Adam Field
Date Deposited: 27 May 2010 14:39
Last Modified: 23 Sep 2013 18:32
URI: http://epubs.surrey.ac.uk/id/eprint/1263

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