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Design Rules to Optimize the Layout of Multilayer Circuit Packages at 100GHz

Abeygunasekera, Anne D and Free, Charles (2008) Design Rules to Optimize the Layout of Multilayer Circuit Packages at 100GHz

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Abstract

New data are presented on the effects of coupling between conductors in a highly integrated, multilayer circuit working at high millimeter wave frequencies. Design rules have been developed to summarize the results and provide guidance to the circuit designer on the minimum spacing between conductors in a multilayer package.

Item Type:Conference or Workshop Item (UNSPECIFIED)
Additional Information:Abeygunasekera, A. D., and Free, C. (2008) Design Rules to Optimize the Layout of Multilayer Circuit Packages at 100GHz. Proceedings of the 2nd IEEE Electronics Systemintegration Technology Conference, Vols. 1 & 2, pp. 1317-1319. ©2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Divisions:Faculty of Engineering and Physical Sciences > Electronic Engineering > Advanced Technology Institute > Nano-Electronics Centre
ID Code:1200
Deposited By:Mr Adam Field
Deposited On:27 May 2010 15:38
Last Modified:24 Oct 2012 10:38

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